1. Local File Header(30byte: 가변값 제외) local file header signature - 4 bytes - (0x04034b50) : 고유 값 version needed to extract - 2 bytes general purpose bit flag - 2 bytes compression method - 2 bytes last mod file time - 2 bytes last mod file date - 2 bytes crc-32 - 4 bytes compressed size - 4 bytes uncompressed size - 4 bytes file name length - 2 bytes extra field length - 2 bytes file name (variable size) extra field (variable size)
2. Central File Header(46byte: 가변값 제외) central file header signature - 4 bytes - (0x02014b50) : 고유 값 version made by - 2 bytes version needed to extract - 2 bytes general purpose bit flag - 2 bytes compression method - 2 bytes last mod file time - 2 bytes last mod file date - 2 bytes crc-32 - 4 bytes compressed size - 4 bytes uncompressed size - 4 bytes file name length - 2 bytes extra field length - 2 bytes file comment length - 2 bytes disk number start - 2 bytes internal file attributes - 2 bytes external file attributes - 4 bytes relative offset of local header 4 bytes file name (variable size) extra field (variable size) file comment (variable size)
3. End Header(22byte: comment 제외) end of central dir signature - 4 bytes - (0x06054b50) : 고유값 number of this disk - 2 bytes number of the disk with the start of the central directory - 2 bytes total number of entries in the central directory on this disk - 2 bytes total number of entries in the central directory - 2 bytes size of the central directory - 4 bytes offset of start of central directory with respect to the starting disk number - 4 bytes .ZIP file comment length - 2 bytes .ZIP file comment (variable size)
Huffman Code는? 디지털 전송에서 평균 부호의 길이를 가장 짧게 할 수 있는 가변 길이 부호(variable length code)의 하나. 신호의 발생 빈도를 고려해서 Code를 배정하는 방법으로, 빈도수가 높으면 Code의 길이를 짧게, 빈도수가 낮으면 Code 길이를 길게 배정한다. 이렇게 배정을 하면 데이터의 손실없이 전체 크기를 줄이는 효과를 가져오게 된다. Fax나 JPEG, MPEG등 각종 정보 압축 규격으로 많이 사용되고 있다.
총 1000개의 글자가 있다고 가정하고, 글자를 3bit로 표현할 경우 총 3000bit를 필요로 한다. 하지만, Huffman code를 사용하게 되면 2180bit를 차지하므로 약 2/3로 압축된 것을 알 수 있다.
In mathematics, the Taylor series is a representation of a function as an infinite sum of terms calculated from the values of its derivatives at a single point. It may be regarded as the limit of the Taylor polynomials. Taylor series are named in honour of English mathematician Brook Taylor. If the series uses the derivatives at zero, the series is also called a Maclaurin series, named after Scottish mathematician Colin Maclaurin.
The Taylor series of a real or complex function f(x) that is infinitely differentiable in a neighborhood of a real or complex number a, is the power series
which in a more compact form can be written as
where n! is the factorial of n and f (n)(a) denotes the nth derivative of f at the point a; the zeroth derivative of f is defined to be f itself and (x − a)^0 and 0! are both defined to be 1.
Often f(x) is equal to its Taylor series evaluated at x for all x sufficiently close to a. This is the main reason why Taylor series are important.
In the particular case where a = 0, the series is also called a Maclaurin series. Examples The Maclaurin series for any polynomial is the polynomial itself.
The Maclaurin series for (1 − x)^(− 1) is the geometric series
so the Taylor series for x^(− 1) at a = 1 is
By integrating the above Maclaurin series we find the Maclaurin series for -ln(1-x), where ln denotes the natural logarithm:
The Maclaurin series for the exponential function e^x at a = 0 is
The above expansion holds because the derivative of e^x is also e^x and e^0 equals 1. This leaves the terms (x − 0)^n in the numerator and n! in the denominator for each term in the infinite sum.
(As the degree of the Taylor polynomial rises, it approaches the correct function. This image shows sinx and Taylor approximations, polynomials of degree 1, 3, 5, 7, 9, 11 and 13.)
A Monte Carlo method is a computational algorithm which relies on repeated random sampling to compute its results. Monte Carlo methods are often used when simulating physical and mathematical systems. Because of their reliance on repeated computation and random or pseudo-random numbers, Monte Carlo methods are most suited to calculation by a computer. Monte Carlo methods tend to be used when it is infeasible or impossible to compute an exact result with a deterministic algorithm.
몬테카를로 법(Monte Carlo method)은, 물리적, 수학적 시스템의 행동을 시뮬레이션하기 위한 계산 알고리즘이다. 다른 알고리즘과는 달리 통계학적이고, 일반적으로 무작위의 숫자를 사용한 비결정적인 방법이다. 스타니스와프 울람이 모나코의 유명한 도박의 도시 몬테카를로의 이름을 본따 명명하였다.
In mathematics, Monte Carlo integration is numerical quadrature using pseudorandom numbers. That is, Monte Carlo integration methods are algorithms for the approximate evaluation of definite integrals, usually multidimensional ones. The usual algorithms evaluate the integrand at a regular grid. Monte Carlo methods, however, randomly choose the points at which the integrand is evaluated.
Informally, to estimate the area of a domain D, first pick a simple domain d whose area is easily calculated and which contains D. Now pick a sequence of random points that fall within d. Some fraction of these points will also fall within D. The area of D is then estimated as this fraction multiplied by the area of d.
The traditional Monte Carlo algorithm distributes the evaluation points uniformly over the integration region. Adaptive algorithms such as VEGAS and MISER use importance sampling and stratified sampling techniques to get a better result.
The Karnaugh map, also known as a Veitch diagram (K-map or KV-map for short), is a tool to facilitate management of Boolean algebraic expressions. A Karnaugh map is unique in that only one variable changes value between squares, in other words, the rows and columns are ordered according to the principles of Gray code.
Usage in boolean logic Normally, extensive calculations are required to obtain the minimal expression of a Boolean function, but one can use a Karnaugh map instead.
* Problem solving uses - Karnaugh maps make use of the human brain's excellent pattern-matching capability to decide which terms should be combined to get the simplest expression. - K-maps permit the rapid identification and elimination of potential race hazards, something that boolean equations alone cannot do. - A Karnaugh map is an excellent aid for simplification of up to six variables, but with more variables it becomes hard even for our brain to discern optimal patterns. - For problems involving more than six variables, solving the boolean expressions is more preferred than the Karnaugh map. Karnaugh maps also help teach about Boolean functions and minimization. Properties A mapping of minterms on a Karnaugh mapA Karnaugh map may have any number of variables, but usually works best when there are only a few - between 2 and 6 for example. Each variable contributes two possibilities to each possibility of every other variable in the system. Karnaugh maps are organized so that all the possibilities of the system are arranged in a grid form and between two adjacent boxes only one variable can change value. This is what allows it to reduce hazards.
When using a Karnaugh map to derive a minimized function, one "covers" the ones on the map by rectangular "coverings" that contain a number of boxes equal to a power of 2 (for example, 4 boxes in a line, 4 boxes in a square, 8 boxes in a rectangle, etc). Once a person has covered the ones, a term of a sum of products is produced by finding the variables that do not change throughout the entire covering, and taking a 1 to mean that variable and a 0 as the complement of that variable. Doing this for every covering gives you a matching function.
One can also use zeros to derive a minimized function. The procedure is identical to the procedure for ones except that each term is a term in a product of sums - and a 1 means the complement of the variable while 0 means the variable non-complemented.
Each square in a Karnaugh map corresponds to a minterm (and maxterm). The picture to the right shows the location of each minterm on the map.
Map The input variables can be combined in 16 different ways, so our Karnaugh map has to have 16 positions. The most convenient way to arrange this is in a 4x4 grid.
K-map showing minterms and boxes covering the desired mintermsThe binary digits in the map represent the function's output for any given combination of inputs. We write 0 in the upper leftmost corner of the map because f = 0 when A = 0, B = 0, C = 0, D = 0. Similarly we mark the bottom right corner as 1 because A = 1, B = 0, C = 1, D = 0 gives f = 1. Note that the values are ordered in a Gray code, so that precisely one variable flips between any pair of adjacent cells.
After the Karnaugh map has been constructed our next task is to find the minimal terms to use in the final expression. These terms are found by encircling groups of 1's in the map. The encirclings must be rectangular and must have an area that is a power of two (i.e. 1, 2, 4, 8, …). The rectangles should be as large as possible without containing any 0's. The optimal encirclings in this map are marked by the green, red and blue lines.
For each of these encirclings we find those variables that have the same state in each of the fields in the encircling. For the first encircling (the red one) we find that:
- The variable A maintains the same state (1) in the whole encircling, therefore it should be included in the term for the red encircling. - Variable B does not maintain the same state (it shifts from 1 to 0), and should therefore be excluded. - C does not change: it is always 0. - D changes. Thus the first term in the Boolean expression is AC'.
For the green encircling we see that A and B maintain the same state, but C and D change. B is 0 and has to be negated before it can be included. Thus the second term is AB'.
In the same way, the blue rectangle gives the term BCD' and so the whole expression is: AC' + AB' + BCD'.
논리 회로는 불 대수(논리 연산)를 실시하는 회로 또는 디지탈 신호를 기억하는 회로 혹은 두가지 기능을 가지는 디지털 회로이다.
A logic gate takes one or more logic-level inputs and produces a single logic-level output. Because the output is also a logic level, an output of one logic gate can connect to the input of one or more other logic gates.
In electronic logic, a logic level is represented by a certain voltage (which depends on the type of electronic logic in use). Each logic gate requires power so that it can source and sink currents to achieve the correct output voltage. In logic circuit diagrams the power is not shown, but in a full electronic schematic, power connections are required. There are 7 positive logic gates and each gate has two laws or rules.
논리 회로의 설계 논리 회로의 설계는 논리식이나 진리표가 사용된다. 좀더 회로도적인 표기 수단으로 MIL 기호 등 논리 소자 기호가 사용되었다.
1960년대에 등장한 표준 논리 IC (TI의 7400 시리즈)에 의하여 아날로그 회로 설계와 논리 설계를 분리하여 단순하게 구현이 가능하게 되었다.
작은 규모에서는 논리 소자 기호로 설계가 가능하지만, 큰 규모가되면 힘들어 진다. 그렇기 때문에 1990년대부터 대규모 회로 설계에는 하드웨어 기술 언어가 사용되고 있다. 그리고 집적 회로 기술의 발전에 대응할 수 있도록 다양한 모델에 적용이 가능한 독립적인 모델(동작 기술)을 사용하여 설계한다.
1990년대 후반에는 개발품의 경우 논리 회로 프로그램을 이용하여 PLD, CPLD, FPGA을 사용하였다. 양산품이나 고성능이 요구될 경우 ASIC를 사용하기도 했다. Logic gates and hardware NAND and NOR logic gates are the two pillars of logic, in that all other types of Boolean logic gates (i.e., AND, OR, NOT, XOR, XNOR) can be created from a suitable network of just NAND or just NOR gate(s). They can be built from relays or transistors, or any other technology that can create an inverter and a two-input AND or OR gate. Hence the NAND and NOR gates are called the universal gates. DeMorgan equivalent symbols By use of De Morgan's theorem, an AND gate can be turned into an OR gate by inverting the sense of the logic at its inputs and outputs. This leads to a separate set of symbols with inverted inputs and the opposite core symbol. These symbols can make circuit diagrams for circuits using active low signals much clearer and help to show accidental connection of an active high output to an active low input or vice-versa.
Storage of bits Related to the concept of logic gates (and also built from them) is the idea of storing a bit of information. The gates discussed up to here cannot store a value: when the inputs change, the outputs immediately react. It is possible to make a storage element either through a capacitor (which stores charge due to its physical properties) or by feedback. Connecting the output of a gate to the input causes it to be put through the logic again, and choosing the feedback correctly allows it to be preserved or modified through the use of other inputs. A set of gates arranged in this fashion is known as a "latch", and more complicated designs that utilise clocks (signals that oscillate with a known period) and change only on the rising edge are called edge-triggered "flip-flops". The combination of multiple flip-flops in parallel, to store a multiple-bit value, is known as a register. When using any of these gate setups the overall system has memory; it is then called a sequential system since its output can be influenced by its previous state(s).
These registers or capacitor-based circuits are known as computer memory. They vary in performance, based on factors of speed, complexity, and reliability of storage, and many different types of designs are used based on the application.
불 대수(영어: Boolean algebra)는 조지 불이 19세기 중반에 고안한 논리 수학의 대표적 형태이다. 불 격자(Boolean lattice)나 불 속(束)이라고도 한다. 불 대수의 연구는 대수적 구조로서 속의 이론을 발전시키는 하나의 계기가 되었다. 수학적인 엄밀한 정의는 다음에 기술한다.
디지털 회로 설계에서는 필수적인 지식이다. 디지털 회로는 전압의 H(High), L(Low)만으로 정보를 연산하기 때문에, 기본적으로 조합 회로는 불 대수에 있는 논리식을 써서 나타낼 수 있다. (하지만, 플립 플랍 등 순차 회로는 단순하게 하나의 논리식으로 나타낼 수 없다.)
불 대수의 기본 연산(논리 연산)은 논리 부정 ¬(not), 논리합 ∨(or), 논리곱 ∧(and)로 출발된다. 이러한 연산 합성 으로부터 만들어지는 연산 중 대표적인 것으로 배타적 논리합(xor)이 있다.
불 대수를 불 격자(불 속)라고 부르는 이유는, ∨, ∧에 대해서 분배 가능한 격자가 되기 때문이다. 즉, 다음 법칙이 성립한다:
1. 멱등 법칙(idempotence): x ∧ x = x ∨ x = x, 2. 교환 법칙(commutativity): x ∧ y = y ∧ x, x ∨ y = y ∨ x, 3. 결합 법칙(associativity): (x ∧ y)∧ z = x ∧(y ∧ z), (x ∨ y)∨ z = x ∨(y ∨ z), 4. 흡수 법칙(absorption): (x ∧ y)∨ x = x, (x ∨ y)∧ x = x, 5. 분배 법칙(distributivity): (x ∨ y)∧ z = (x ∧ z)∨(y ∧ z), (x ∧ y)∨ z = (x ∨ z)∧(y ∨ z).
또한 불 대수에서는 다음 조건이 성립한다: 참을 1 거짓을 0으로 하여, 각 x 항과 반대되는 ¬x 항이 존재할 때, (x ∧ ¬x = 0), (x ∨ ¬x = 1)을 만족한다. 수학에서는 이러한 조건을 공리(公理, axiom)라 하여, 그것을 만족하는 집합을 불 격자(속)나 불 대수라고 한다.
Boolean algebra (or Boolean logic) is a logical calculus of truth values, developed by George Boole. It resembles the algebra of real numbers as taught in high school, but with the numeric operations of multiplication xy, addition x + y, and negation −x replaced by the logical operations of conjunction x∧y, disjunction x∨y, and complement ¬x. The Boolean operations are these and all other operations obtainable from them by composition; equivalently, the finitary operations on the set {0,1}. The laws of Boolean algebra can be defined axiomatically as the equations derivable from a sufficient finite subset of those laws, such as the equations axiomatizing a complemented distributive lattice or a Boolean ring, or semantically as those equations identically true or valid over {0,1}. The axiomatic approach is sound and complete in the sense that it proves respectively neither more nor fewer laws than the validity-based semantic approach. Applications Boolean algebra as the calculus of two values is fundamental to digital logic, computer programming, and mathematical logic, and is also used in other areas of mathematics such as set theory and statistics.
Digital logic codes its symbols in various ways: as voltages on wires in high-speed circuits and capacitive storage devices, as orientations of a magnetic domain in ferromagnetic storage devices, as holes in punched cards or paper tape, and so on. Now it is possible to code more than two symbols in any given medium. For example one might use respectively 0, 1, 2, and 3 volts to code a four-symbol alphabet on a wire, or holes of different sizes in a punched card. In practice however the tight constraints of high speed, small size, and low power combine to make noise a major factor. This makes it hard to distinguish between symbols when there are many of them at a single site. Rather than attempting to distinguish between four voltages on one wire, digital designers have settled on two voltages per wire, high and low. To obtain four symbols one uses two wires, and so on.
Programmers programming in machine code, assembly language, and other programming languages that expose the low-level digital structure of the data registers operate on whatever symbols were chosen for the hardware, invariably bit vectors in modern computers for the above reasons. Such languages support both the numeric operations of addition, multiplication, etc. performed on words interpreted as integers, as well as the logical operations of disjunction, conjunction, etc. performed bit-wise on words interpreted as bit vectors. Programmers therefore have the option of working in and applying the laws of either numeric algebra or Boolean algebra as needed. A core differentiating feature is carry propagation with the former but not the latter.
Other areas where two values is a good choice are the law and mathematics. In everyday relaxed conversation, nuanced or complex answers such as "maybe" or "only on the weekend" are acceptable. In more focused situations such as a court of law or theorem-based mathematics however it is deemed advantageous to frame questions so as to admit a simple yes-or-no answer---is the defendant guilty or not guilty, is the proposition true or false---and to disallow any other answer. However much of a straitjacket this might prove in practice for the respondent, the principle of the simple yes-no question has become a central feature of both judicial and mathematical logic, making two-valued logic deserving of organization and study in its own right.
A central concept of set theory is membership. Now an organization may permit multiple degrees of membership, such as novice, associate, and full. With sets however an element is either in or out. The candidates for membership in a set work just like the wires in a digital computer: each candidate is either a member or a nonmember, just as each wire is either high or low.
Algebra being a fundamental tool in any area amenable to mathematical treatment, these considerations combine to make the algebra of two values of fundamental importance to computer hardware, mathematical logic, and set theory. It has not featured so prominently in law however, perhaps because mathematical methods in general have not been applied as vigorously there as in these other application areas. Basic operations
After values, the next ingredient of any algebraic system is its operations. Whereas elementary algebra is based on numeric operations multiplication xy, addition x + y, and negation −x, Boolean algebra is customarily based on logical counterparts to those operations, namely conjunction x∧y (AND), disjunction x∨y (OR), and complement or negation ¬x (NOT).
Conjunction is the closest of these three to its numerical counterpart, in fact on 0 and 1 it is multiplication. As a logical operation the conjunction of two propositions is true when both propositions are true, and otherwise is false. The first column of Figure 1 below tabulates the values of x∧y for the four possible valuations for x and y; such a tabulation is traditionally called a truth table.
Disjunction, in the second column of the figures, works almost like addition, with one exception: the disjunction of 1 and 1 is neither 2 nor 0 but 1. Thus the disjunction of two propositions is false when both propositions are false, and otherwise is true. This is just the definition of conjunction with true and false interchanged everywhere; because of this we say that disjunction is the dual of conjunction.
Logical negation however does not work like numerical negation at all. Instead it corresponds to incrementation: ¬x = x+1 mod 2. Yet it shares in common with numerical negation the property that applying it twice returns the original value: ¬¬x = x, just as −(−x) = x. An operation with this property is called an involution. The set {0,1} has two permutations, both involutary, namely the identity, no movement, corresponding to numerical negation mod 2 (since +1 = −1 mod 2), and SWAP, corresponding to logical negation. Using negation we can formalize the notion that conjunction is dual to disjunction via De Morgan's laws, ¬(x∧y) = ¬x ∨ ¬y and ¬(x∨y) = ¬x ∧ ¬y. These can also be construed as definitions of conjunction in terms of disjunction and vice versa: x∧y = ¬(¬x ∨ ¬y) and x∨y = ¬(¬x ∧ ¬y).
Various representations of Boolean operationsFigure 2 shows the symbols used in digital electronics for conjunction and disjunction; the input ports are on the left and the signals flow through to the output port on the right. Inverters negating the input signals on the way in, or the output signals on the way out, are represented as circles on the port to be inverted.
해밍 부호(해밍符號, Hamming code)는 오류 정정 부호의 일종으로 리처드 해밍이 제안했다. 보통 해밍 부호라고 할 때는 해밍 (7,4) 부호를 가리킨다. 해밍 부호는 1비트 오류만 일어날 때는 오류를 정정할 수 있고, 2비트까지의 오류를 검출할 수 있다.
역사
해밍은 1940년대 벨 연구소에서 Bell Model V라는 컴퓨터를 이용해서 작업을 했다. 이 컴퓨터는 확실히 여러 면에서 오늘날의 컴퓨터와는 거리가 멀었다. 릴레이 회로로 만들어졌으며 입력도 천공카드를 이용했다. 천공카드를 이용했으므로 컴퓨터에 입력되는 자료들은 필연적으로 언제나 오류의 가능성이 있었다. 주중에는 컴퓨터의 관리자(operator)가 있으면서 입력에 오류가 발생했다는 경고등이 켜지면 직접 수정할 수 있었으나, 관리자가 없는 주말에는 에러가 발생한 채 프로그램이 실행되지 않고 다음 작업으로 넘어가기 일쑤였다.
해밍은 이런 문제로 인해 여러 차례 고생을 한 후에, 이 문제를 근본적으로 해결하기 위해 노력했다. 그후 몇 년 동안 오류를 수정하는 방법에 대해서 연구하면서 이와 관련된 여러가지의 효율적인 알고리즘을 만들어냈고 마침내 1950년에 해밍 부호를 발표했다. 해밍 부호는 오늘날에도 사용되고 있다.
패리티 비트
패리티 비트 (parity bit)는 주어진 비트열에 1이 짝수번 나오는지 홀수번 나오는지 추가적인 정보를 입력하는 방식이다. 예를 들어, 어떤 비트열에 1이 홀수번 나오면 패리티 비트가 1이고 짝수면 0으로 정했다고 하자. '1101011'이라는 비트열에는 1이 3번 나오므로 패리티 비트가 1이 되어서 최종적으로 11010111'이라고 쓰는 방식이다.
패리티 비트는 여러가지 단점이 있다.
짝수 개의 오류가 발생하면 하면 오류를 검출하지 못하는 경우가 생길 수 있다. 예를 들어서 '0000'을 보내려고 패리티 비트 '0'을 추가해서 '00000'을 전송했는데 오류가 발생해서 '01010'이 전송되었다고 하자. 받는 쪽에서는 1이 두번 나오므로 패리티 비트가 제대로 0으로 설정되었다고 생각할 것이고, 결과적으로 오류를 검출하지 못하게 된다. 전송된 비트열에 오류가 발생했다는 것을 알았다 하더라도 오류가 발생하기 전의 제대로 된 내용을 알 수 없다. 예를 들어서 '001000'이라는 비트열을 받았다고 하자. 이 비트열에서 1이 한 번 나오기 때문에 전송중에 오류가 생겼다는 것을 알 수 있지만, 원래 비트열은 알 수가 없다. 따라서 결과적으로 데이터를 다시 전송해야 하는 문제가 있다. 데이터의 전송 과정에서 오류가 발생하므로 패리티 비트 자체에도 오류가 생길 수 있다.
해밍 부호를 만드는 방법
2의 거듭제곱번째 위치에 있는 비트들은 패리티 비트로 사용한다. (1, 2, 4, 8, 16, 32, 64, …번째 비트) 나머지 비트에는 부호화될 데이터가 들어 간다. (3, 5, 6, 7, 9, 10, 11, 12, 13, 14, 15, 17, …번째 비트)
진성반도체란 불순물을 첨가하지 않은 순수한 반도체를 가르킨다. 영국말 intrinsic semiconductor 로부터 I형 반도체라고도 한다.
특징
캐리어 밀도 도핑된 경우는 도펀트의 밀도로 정재지는 캐리어밀도이지만, 진성 반도체는 불순물 밀도가 아니고 재질자체가 캐리어 밀도를 결정한다. 이 캐리어 밀도를 진성 캐리어 밀도 (ni)라고 한다. 이 진성 캐리어 밀도는 매우 낮은 값 (～1010 /cm3)이다. 이것은 일반적인 도핑으로 얻을 수 있는 캐리어 밀도보다 약 10 자리수만큼 낮은값이기 때문에 일반적인 반도체를 사용하는 경우는 도핑을 하는 경우가 많다.
페르미 준위 도핑된 경우에 페르미준위는 도너 준위나 억셉터 준위 근처에 존재하지만, 진성 반도체는 띠간격의 띠 중앙에 위치한다.
캐리어 이동도 진성 반도체는 불순물의 도핑이 되지 않았기 때문에 캐리어는 이온화 불순물 산란의 영향을 받지 않는다. 그렇기에 도핑되었을 때와 비교해서 매우 빠른 이동도를 나타낸다. 하지만 이전에 말했듯이 진성 반도체는 캐리어 밀도가 매우 낮기때문에 용도또한 한정된다. 탄소구조에 의한 이차원 전자 가스 를 이용한 반도체소자 (예시 HEMT)가 있다. 도핑 진성 반도체는 캐리어 밀도가 낮기때문에 일반적으로는 진성 반도체에 불순물을 도핑한 불순물 반도체 (외인성 반도체)가 사용된다. 불순물 반도체는 도너나 억셉터의 열여기에 의한 캐리어가 전도에 기여한다. 캐리어가 홀 (전공)인 P형 반도체와 캐리어가 전자인 N형 반도체로 크게 구별된다. 캐리어의 종류는 불순물의 최외각 전자의 수에 의하여 결정되며 최외각 전자가 4보다 크면 N형 반도체, 최외각 전자가 4보다 작으면 P형 반도체가 된다. 실리콘에서 인, 비소를 도핑했을 때는 N형 반도체, 붕소를 도핑했을 때는 P형 반도체가 된다.
불순물반도체는 반도체의 한 종류이다. 외인성 반도체 (영어: extrinsic semiconductor)라고도 한다. 순수한 진성반도체에 불순물 (도펀트)를 소량첨가 (도핑)한 것이다. 도핑하는 원소에 의하여 캐리어가 홀 (정공)인 P형 반도체, 캐리어가 전자인 N형 반도체를 얻을 수 있다.
캐리어의 종류는 불순물 원소의 최외각전자수에 의존적이며, 최외각전자가 4보다 클 경우는 N형 반도체, 최외각전자가 4보다 작을 경우는 P형 반도체가 된다. 반도체의 한종류인 규소를 예로 들면, 비소, 인의 경우에는 N형 반도체, 붕소의 경우에는 P형 반도체가 된다.
In mathematics, the spherical coordinate system is a coordinate system for representing geometric figures in three dimensions using three coordinates: the radial distance of a point from a fixed origin, the zenith angle from the positive z-axis, and the azimuth angle from the positive x-axis.
Definition The three coordinates (ρ, θ, φ) are defined as:
* ρ ≥ 0 is the distance from the origin to a given point P. * 0 ≤ θ ≤ 360° is the angle between the positive x-axis and the line from the origin to the P projected onto the xy-plane. * 0 ≤ φ ≤ 180° is the angle between the positive z-axis and the line formed between the origin and P.
θ is referred to as the azimuth, while φ is referred to as the zenith, colatitude or polar angle. θ and φ and lose significance when ρ = 0 and θ loses significance when sin(φ) = 0 (at φ = 0 and φ = 180°).
To plot a point from its spherical coordinates, go ρ units from the origin along the positive z-axis, rotate φ about the y-axis in the direction of the positive x-axis and rotate θ about the z-axis in the direction of the positive y-axis.
Coordinate system conversions As the spherical coordinate system is only one of many three-dimensional coordinate systems, there exist equations for converting coordinates between the spherical coordinate system and others.
Cartesian coordinate system The three spherical coordinates are obtained from Cartesian coordinates by: Note that the arctangent must be defined suitably so as to take account of the correct quadrant of y / x. The atan2 or equivalent function accomplishes this for computational purposes.
Conversely, Cartesian coordinates may be retrieved from spherical coordinates by:
Cylindrical coordinate system
The cylindrical coordinate system is a three-dimensional extrusion of the polar coordinate system, with an h coordinate to describe a point's height above or below the xy-plane. The full coordinate tuple is (r, θ, h).
Cylindrical coordinates may be converted into spherical coordinates by:
Spherical coordinates may be converted into cylindrical coordinates by:
이진화 십진법(Binary-coded decimal, BCD)은 십진법 숫자를 이진법으로 표현된 비트들의 연속으로 표현하는 방법으로, 하나의 십진법 자리가 네 개의 이진법 자리에 곧바로 대응하므로 변환이나 역변환이 쉽다는 이점을 갖고 있다. 그러나 쓰이지 않고 버려지는 패턴이 많고 연산을 위해서 더 많은 처리와 회로가 필요하다는 단점이 있다.
이진화 십진법은 특히 숫자의 십진 출력을 요하는 전자 회로와 마이크로프로세서에서 많이 사용되는데, 이는 순수 이진법으로 표현된 숫자를 십진법으로 출력하기 위해서는 복잡한 나눗셈 회로가 필요하기 때문이다. 이진화 십진법을 사용할 경우 각 자리 별로 하나씩 간단한 변환 회로를 만들어서 7세그먼트 표시 장치 등에 바로 연결할 수 있기 때문에 전체적인 구현을 간편하게 할 수 있다. 이 때문에 일부 프로세서는 아예 BCD로 덧셈과 뺄셈 등의 간단한 연산을 할 수 있는 명령을 갖추고 있다.
규칙 이진화 십진법에서 십진법의 각 자리는 다음 표에 따라 네 개의 비트로 변환된다. 역변환도 동일하다.
많은 컴퓨터가 8비트를 묶어서 1바이트로 처리하기 때문에, 이런 환경에서 이진화 십진법을 저장하는 방법은 두 가지가 있을 수 있다.
* 한 바이트에 한 자리만을 저장하고, 남는 네 자리를 0000이나 1111(EBCDIC의 경우), 또는 0011(ASCII의 경우) 등으로 채운다. * 한 바이트에 두 자리를 저장한다.
In computing and electronic systems, Binary-coded decimal (BCD) is an encoding for decimal numbers in which each digit is represented by its own binary sequence. Its main virtue is that it allows easy conversion to decimal digits for printing or display and faster decimal calculations. Its drawbacks are the increased complexity of circuits needed to implement mathematical operations and a relatively inefficient encoding – 6 wasted patterns per digit. Even though the importance of BCD has diminished [citation needed], it is still widely used in financial, commercial, and industrial applications.
In BCD, a digit is usually represented by four bits which, in general, represent the values/digits/characters 0-9. Other bit combinations are sometimes used for sign or other indications.
Basics To BCD-encode a decimal number using the common encoding, each decimal digit is stored in a four-bit nibble.
Thus, the BCD encoding for the number 127 would be: 0001 0010 0111
Since most computers store data in eight-bit bytes, there are two common ways of storing four-bit BCD digits in those bytes:
* each digit is stored in one byte, and the other four bits are then set to all zeros, all ones (as in the EBCDIC code), or to 0011 (as in the ASCII code) * two digits are stored in each byte.
Unlike binary encoded numbers, BCD encoded numbers can easily be displayed by mapping each of the nibbles to a different character. Converting a binary encoded number to decimal for display is much harder involving integer multiplication or divide operations. The BIOS in many PCs keeps the date and time in BCD format, probably for historical reasons (it avoided the need for binary to ASCII conversion).
In mathematics, negative numbers in any base are represented in the usual way, by prefixing them with a "−" sign. However, on a computer, there are various ways of representing a number's sign. This article deals with four methods of extending the binary numeral system to represent signed numbers: sign-and-magnitude, ones' complement, two's complement, and excess-N.
For most purposes, modern computers typically use the two's-complement representation, but other representations are used in some circumstances. Sign-and-magnitude
One may first approach this problem of representing a number's sign by allocating one sign bit to represent the sign: set that bit (often the most significant bit) to 0 for a positive number, and set to 1 for a negative number. The remaining bits in the number indicate the magnitude (or absolute value). Hence in a byte with only 7 bits (apart from the sign bit), the magnitude can range from 0000000 (0) to 1111111 (127). Thus you can represent numbers from −12710 to +12710 once you add the sign bit (the eighth bit). A consequence of this representation is that there are two ways to represent 0, 00000000 (0) and 10000000 (−0). Decimal −43 encoded in an eight-bit byte this way is 10101011.
This approach is directly comparable to the common way of showing a sign (placing a "+" or "−" next to the number's magnitude). Some early binary computers (e.g. IBM 7090) used this representation, perhaps because of its natural relation to common usage. (Many decimal computers also used sign-and-magnitude.) Ones' complement
Alternatively, a system known as ones' complement can be used to represent negative numbers. The ones' complement form of a negative binary number is the bitwise NOT applied to it — the complement of its positive counterpart. Like sign-and-magnitude representation, ones' complement has two representations of 0: 00000000 (+0) and 11111111 (−0).
As an example, the ones' complement form of 00101011 (43) becomes 11010100 (−43). The range of signed numbers using ones' complement in a conventional eight-bit byte is −12710 to +12710.
To add two numbers represented in this system, one does a conventional binary addition, but it is then necessary to add any resulting carry back into the resulting sum. To see why this is necessary, consider the following example showing the case of the addition of −1 (11111110) to +2 (00000010).
In the previous example, the binary addition alone gives 00000000—not the correct answer! Only when the carry is added back in does the correct result (00000001) appear.
This numeric representation system was common in older computers; the PDP-1 and UNIVAC 1100/2200 series, among many others, used ones'-complement arithmetic.
(A remark on terminology: The system is referred to as "ones' complement" because the negation of x is formed by subtracting x from a long string of ones. Two's complement arithmetic, on the other hand, forms the negation of x by subtracting x from a single large power of two.)
The IPv4 header checksum uses ones' complement arithmetic, here even on two's complement machines the inconvenience of having to add back a carry is a desirable error-checking property, because "it is equally sensitive to errors in all bit positions". In the UDP protocol one of the two representations of 0 provided by the ones' complement arithmetic is used for indicating that the optional checksum feature has been omitted (all 0s), whereas the other (all 1s) indicates a checksumming result of 0.
Note that the ones' complement representation of a negative number can be obtained from the sign-magnitude representation merely by bitwise complementing the magnitude.
Two's complement (http://en.wikipedia.org/wiki/Twos_complement) The problems of multiple representations of 0 and the need for the end-around carry are circumvented by a system called two's complement. In two's complement, negative numbers are represented by the bit pattern which is one greater (in an unsigned sense) than the ones' complement of the positive value.
In two's-complement, there is only one zero (00000000). Negating a number (whether negative or positive) is done by inverting all the bits and then adding 1 to that result. Addition of a pair of two's-complement integers is the same as addition of a pair of unsigned numbers (except for detection of overflow, if that is done). For instance, a two's-complement addition of 127 and −128 gives the same binary bit pattern as an unsigned addition of 127 and 128, as can be seen from the above table.
한글 P채널과 N채널의 MOSFET을 상호 보완하여 연결한 집적 회로의 구조이다. TTL 논리 소자와 비교해서 소비전력이 적은 논리 회로를 구현할수 있고, 집적도를 향상시키는것이 가능하다.
MOSFET의 동작 영역에서 직류 전달 특성은 선형 영역에서 출력 전압이 입력 전압과 거의 같고 포화 영역에서 출력 전압은 게이트 전압에서 「문턱 전압」을 뺀 값이 된다. P-MOSFET가 포화 영역일때 N-MOSFET는 선형 영역이고, N-MOSFET가 포화 영역일때 P-MOSFET는 선형 영역이다. 시모스의 동작 영역의 대부분은 선형 영역이다. 엄밀하게 양자의 「문턱 전압」이 겹치는 영역이 존재기 때문에 사용하지 않는 입력 단자는 「문턱 전압」영역에 들어가지 않도록 풀업 또는 풀다운에 연결해 주는것이 좋다.
시모스 구조로 하면 게이트 전압에 입력되는 제어 펄스를 "1"에서 "0"으로 변경했을 경우에 노이즈 없이 이전의 출력을 할수 있고, "0"에서 "1"로 변경했을 경우 역시 노이즈 없이 입력 신호를 출력할 수 있다.
시모스 구조의 논리 회로는 전원 전압을 낮게 하면 소비 전력이 적은 반면 전달 지연 시간이 커지는 특성을 가지고 있다. 제조 프로세서의 개선에 의하여 저전압 동작과 고속 동작을 할 수 있게 되었다.
1990년대가 되면서 반도체 메모리나 마이크로프로세서의 논리 IC는 대부분 시모스 구조가 되었으며 , 소규모 전원 회로, 아날로그-디지털 변환회로, 디지털-아날로그 변환회로등을 포함되어서 제작하기 시작하였다. 영문 Complementary metal–oxide–semiconductor (CMOS) ("see-moss", IPA: ['si.mɜs]), is a major class of integrated circuits. CMOS technology is used in chips such as microprocessors, microcontrollers, static RAM, and other digital logic circuits. CMOS technology is also used for a wide variety of analog circuits such as image sensors, data converters, and highly integrated transceivers for many types of communication.
CMOS is also sometimes explained as complementary-symmetry metal–oxide–semiconductor. The words "complementary-symmetry" refer to the fact that the typical digital design style with CMOS uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions.
Two important characteristics of CMOS devices are high noise immunity and low static power supply drain. Significant power is only drawn when its transistors are switching between on and off states; consequently, CMOS devices do not produce as much heat as other forms of logic such as TTL (transistor-transistor logic). CMOS also allows a high density of logic functions on a chip.
The triple compound "metal–oxide–semiconductor" is a reference to the nature of the physical structure of early (and interestingly now, the very latest) field-effect transistors, having a metal gate electrode placed on top of an oxide insulator, which in turn is on top of a semiconductor material. Instead of metal, current gate electrodes (including those up to the 65 nanometer technology node) are almost always made from a different material, polysilicon, but the terms MOS and CMOS nevertheless continue to be used for the modern descendants of the original process. (See also MOSFET.) Metal gates have made a comeback with the advent of high-k dielectric materials in the CMOS transistor as announced by IBM and Intel for the 45 nanometer node and beyond.
The combination of MEMS sensors with digital signal processors on one single CMOS chip is sometimes known an CMOSens.
The cylindrical coordinate system is a three-dimensional coordinate system which essentially extends circular polar coordinates by adding a third coordinate (usually denoted h) which measures the height of a point above the plane.
A point P is given as (r,θ,h). In terms of the Cartesian coordinate system:
* r is the distance from O to P', the orthogonal projection of the point P onto the XY plane. This is the same as the distance of P to the z-axis.
* θ is the angle between the positive x-axis and the line OP', measured counterclockwise.
* h is the same as z.
* Thus, the conversion function f from cylindrical coordinates to Cartesian coordinates is f(x,y,z) = (rcosθ,rsinθ,h). For use in physical sciences and technology, the recommended international standard notation is ρ, φ, z (ISO 31-11).
Some mathematicians indeed use (r,θ,z).
Cylindrical coordinates are useful in analyzing surfaces that are symmetrical about an axis, with the z-axis chosen as the axis of symmetry. For example, the infinitely long circular cylinder that has the Cartesian equation x2 + y2 = c2 has the very simple equation r = c in cylindrical coordinates. Hence the name "cylindrical" coordinates.
In mathematics, the Cartesian coordinate system (also called rectangular coordinate system) is used to determine each point uniquely in a plane through two numbers, usually called the x-coordinate and the y-coordinate of the point. To define the coordinates, two perpendicular directed lines (the x-axis or abscissa and the y-axis or ordinate), are specified, as well as the unit length, which is marked off on the two axes (see Figure 1). Cartesian coordinate systems are also used in space (where three coordinates are used) and in higher dimensions.
Using the Cartesian coordinate system, geometric shapes (such as curves) can be described by algebraic equations, namely equations satisfied by the coordinates of the points lying on the shape. Two-dimensional coordinate system
A Cartesian coordinate system in two dimensions is commonly defined by two axes, at right angles to each other, forming a plane (an xy-plane). The horizontal axis is normally labeled x, and the vertical axis is normally labeled y. In a three dimensional coordinate system, another axis, normally labeled z, is added, providing a third dimension of space measurement. The axes are commonly defined as mutually orthogonal to each other (each at a right angle to the other). (Early systems allowed "oblique" axes, that is, axes that did not meet at right angles, and such systems are occasionally used today, although mostly as theoretical exercises.) All the points in a Cartesian coordinate system taken together form a so-called Cartesian plane. Equations that use the Cartesian coordinate system are called Cartesian equations.
The point of intersection, where the axes meet, is called the origin normally labeled O. The x and y axes define a plane that is referred to as the xy plane. Given each axis, choose a unit length, and mark off each unit along the axis, forming a grid. To specify a particular point on a two dimensional coordinate system, indicate the x unit first (abscissa), followed by the y unit (ordinate) in the form (x,y), an ordered pair.
The choice of letters comes from a convention, to use the latter part of the alphabet to indicate unknown values. In contrast, the first part of the alphabet was used to designate known values.
An example of a point P on the system is indicated in Figure 3, using the coordinate (3,5).
The intersection of the two axes creates four regions, called quadrants, indicated by the Roman numerals I (+,+), II (−,+), III (−,−), and IV (+,−). Conventionally, the quadrants are labeled counter-clockwise starting from the upper right ("northeast") quadrant. In the first quadrant, both coordinates are positive, in the second quadrant x-coordinates are negative and y-coordinates positive, in the third quadrant both coordinates are negative and in the fourth quadrant, x-coordinates are positive and y-coordinates negative (see table below.) Three-dimensional coordinate system
The three dimensional Cartesian coordinate system provides the three physical dimensions of space — length, width, and height. Figures 4 and 5, show two common ways of representing it. The three Cartesian axes defining the system are perpendicular to each other. The relevant coordinates are of the form (x,y,z). As an example, figure 4 shows two points plotted in a three-dimensional Cartesian coordinate system: P(3,0,5) and Q(−5,−5,7). The axes are depicted in a "world-coordinates" orientation with the z-axis pointing up. The x-, y-, and z-coordinates of a point can also be taken as the distances from the yz-plane, xz-plane, and xy-plane respectively. Figure 5 shows the distances of point P from the planes. The xy-, yz-, and xz-planes divide the three-dimensional space into eight subdivisions known as octants, similar to the quadrants of 2D space. While conventions have been established for the labelling of the four quadrants of the x-y plane, only the first octant of three dimensional space is labelled. It contains all of the points whose x, y, and z coordinates are positive. The z-coordinate is also called applicate.
수학에서 외적(外積)은 3차원 공간의 벡터들간의 이항연산의 일종이다. 연산의 결과가 스칼라인 내적(內積)과는 달리 연산의 결과가 벡터이기 때문에 벡터곱(vector product)이라고 불리기도 한다. 외적은 물리학의 각운동량, 로렌츠 힘등의 공식에 등장한다.
정의
두 벡터 a와 b의 외적은 a x b라 쓰고(수학자들은 a ^ b라고 쓰기도 한다.), 다음과 같이 정의된다.
식에서 θ는 a와 b가 이루는 각을 나타내며, n은 a와 b에 공통으로 수직인 단위벡터를 나타낸다.
위 정의에서의 문제점은 a와 b에 공통으로 수직인 방향이 두개라는 점이다. 즉, n이 수직이면, -n도 수직이다.
어느 것을 두 벡터의 외적으로 할 것인가는 벡터공간의 방향성(orientation)에 따라 달라진다. 오른손 좌표계에서는 a×b는, a, b, a×b가 오른손 좌표계 방향을 따르도록 정의되고, 왼손좌표계에선 마찬가지로 이 순서의 세 벡터가 왼손 좌표계 방향을 따르도록 정의된다.
In mathematics, the cross product is a binary operation on two vectors in a three-dimensional Euclidean space that results in another vector which is perpendicular to the two input vectors. By contrast, the dot product produces a scalar result. In many engineering and physics problems, it is handy to be able to construct a perpendicular vector from two existing vectors, and the cross product provides a means for doing so. The cross product is also known as the vector product, or Gibbs vector product.
The cross product is not defined except in three-dimensions (and the algebra defined by the cross product is not associative). Like the dot product, it depends on the metric of Euclidean space. Unlike the dot product, it also depends on the choice of orientation or "handedness." Certain features of the cross product can be generalized to other situations. For arbitrary choices of orientation, the cross product must be regarded not as a vector, but as a pseudovector. For arbitrary choices of metric, and in arbitrary dimensions, the cross product can be generalized by the exterior product of vectors, defining a two-form instead of a vector.
Definition
The cross product of two vectors a and b is denoted by a × b. In a three-dimensional Euclidean space, with a usual right-handed coordinate system, it is defined as a vector c that is perpendicular to both a and b, with a direction given by the right-hand rule and a magnitude equal to the area of the parallelogram that the vectors span.
The cross product is given by the formula
where θ is the measure of the (non-obtuse) angle between a and b (0° ≤ θ ≤ 180°), a and b are the magnitudes of vectors a and b, and is a unit vector perpendicular to the plane containing a and b. If the vectors a and b are collinear (i.e., the angle θ between them is either 0° or 180°), by the above formula, the cross product of a and b is the zero vector 0.
The direction of the vector is given by the right-hand rule, where one simply points the forefinger of the right hand in the direction of a and the middle finger in the direction of b. Then, the vector is coming out of the thumb (see the picture on the right).
Using the cross product requires the handedness of the coordinate system to be taken into account (as explicit in the definition above). If a left-handed coordinate system is used, the direction of the vector is given by the left-hand rule and points in the opposite direction.
This, however, creates a problem because transforming from one arbitrary reference system to another (e.g., a mirror image transformation from a right-handed to a left-handed coordinate system), should not change the direction of . The problem is clarified by realizing that the cross-product of two vectors is not a (true) vector, but rather a pseudovector. See cross product and handedness for more detail.
The dot product of two vectors (from an orthonormal vector space) a = [a1, a2, … , an] and b = [b1, b2, … , bn] is by definition:
where Σ denotes summation notation.
For example, the dot product of two three-dimensional vectors [1, 3, −5] and [4, −2, −1] is
Using matrix multiplication and treating the (column) vectors as n×1 matrices, the dot product can also be written as:
where aT denotes the transpose of the matrix a.
Using the example from above, this would result in a 1×3 matrix (i.e., vector) multiplied by a 3×1 vector (which, by virtue of the matrix multiplication, results in a 1×1 matrix, i.e., a scalar):
-------------------------------------------------------------------------------------------------- The dot product of two vectors a and b (sometimes called inner product, or, since its result is a scalar, the scalar product) is denoted by a ∙ b and is defined as:
where ||a|| and ||b|| denote the norm (or length) of a and b, and θ is the measure of the angle between a and b (see trigonometric function for an explanation of cosine). Geometrically, this means that a and b are drawn with a common start point and then the length of a is multiplied with the length of that component of b that points in the same direction as a.
The dot product can also be defined as the sum of the products of the components of each vector:
where a and b are vectors of n dimensions; a1, a2, …, an are coordinates of a; and b1, b2, …, bn are coordinates of b.
This operation is often useful in physics; for instance, work is the dot product of force and displacement.
In calculus, l'Hôpital's rule (also spelled l'Hospital) uses derivatives to help compute limits with indeterminate forms. Application (or repeated application) of the rule often converts an indeterminate form to a determinate form, allowing easy computation of the limit. The rule is named after the 17th-century French mathematician Guillaume de l'Hôpital, who published the rule in his book Analyse des infiniment petits pour l'intelligence des lignes courbes (literal translation: Analysis of the infinitely small to understand curves) (1696), the first book to be written on differential calculus.
The rule is believed to be the work of Johann Bernoulli since l'Hôpital, a nobleman, paid Bernoulli a retainer of 300₣ per year to keep him updated on developments in calculus and to solve problems he had. (Moreover, the two signed a contract allowing l'Hôpital to use Bernoulli's discoveries in any way he wished.)[1] Among these problems was that of limits of indeterminate forms. When l'Hôpital published his book, he gave due credit to Bernoulli and, not wishing to take credit for any of the mathematics in the book, he published the work anonymously. Bernoulli, who was known for being extremely jealous, claimed to be the author of the entire work, and until recently, it was believed to be so. Nevertheless, the rule was named for l'Hôpital, who never claimed to have invented it in the first place[2].
The Stolz-Cesàro theorem is a similar result involving limits of sequences, and using finite difference operators rather than derivatives. Introduction
In simple cases, l'Hôpital's rule states that for functions f(x) and g(x), if:
or:
then:
where the prime (') denotes the derivative.
Among other requirements, for this rule to hold, the limit must exist. Other requirements are detailed below, in the formal statement. Proofs of l'Hôpital's rule Proof by Cauchy's mean value theorem
The most common proof of l'Hôpital's rule uses Cauchy's mean value theorem. With the indeterminate form 0 over 0
The case when
First, we expand continuously (or redefine) f(x) and g(x) by 0 for x = c. This doesn't change the limit since the limit doesn't depend on the value in the point (by definition).
According to Cauchy's mean value theorem there is a constant ξ in c < ξ < c + h such that:
Since f(c) = g(c) = 0,
If then and
With the indeterminate form infinity over infinity
This is a list of device bandwidths: the channel capacity (or, more informally, bandwidth) of some computer devices employing methods of data transport is listed by bit/s, kilobit/s (kbit/s), megabit/s (Mbit/s), or gigabit/s (Gbit/s) as appropriate and also MB/s or megabytes per second. They are listed in order from lowest bandwidth to highest.
Whether to use bit/s or byte/s (B/s) is often a matter of convention. The most commonly cited measurement is bolded. In general, parallel interfaces are quoted in byte/s (B/s), serial in bit/s. On devices like modems, bytes may be more than 8 bits long because they may be individually padded out with additional start and stop bits; the figures below will reflect this. Where channels use line codes, such as Ethernet, Serial ATA and PCI Express, quoted speeds are for the decoded signal.
Many of these figures are theoretical maxima, and various real-world considerations will generally keep the actual effective throughput much lower. The actual throughput achievable on Ethernet networks, for example (especially when heavily loaded or when running over substandard media), is debatable. The figures are also simplex speeds, which may conflict with the duplex speeds vendors sometimes use in promotional materials.
All of the figures listed here are true metric quantities and use metric binary prefixes (1 kilobit, for example, is 1000 bits, not 1024 bits). Similarly, kB, MB, GB mean kilobytes, megabytes, gigabytes, not kibibytes, mebibytes, gibibytes.
VHDL은 디지털 회로의 설계 자동화에 사용하는 하드웨어 기술 언어이다. VHDL이라는 이름은 'VHSIC 하드웨어 기술 언어'(VHSIC Hardware Description Languae)의 약자이다.
VHDL는 원래 미국 국방부에서 주문형 집적회로(ASIC)의 문서화에 사용하기 위해 만든 언어였다. 즉, 복잡한 매뉴얼로 회로의 동작 내용을 설명하는 대신, 회로의 동작 내용을 문서화하여 설명하기 위해 개발했다. 그러나 이런 문서를 회로 디자인 과정에서 시뮬레이션에 사용하게 되었고, VHDL 파일을 읽어들여서 논리 합성을 한 다음 실제 회로 형태를 출력하는 기능을 덧붙이게 되었다. 오늘날에는 디지털 회로의 설계, 검증, 구현등의 모든 용도로 사용하고 있다.
VHDL은 Ada 프로그래밍 언어의 부분집합에 디지털 회로에 필수적인 시간 개념을 추가하는 방식으로 만들어졌으나, IEEE 표준화 작업을 거치면서 오늘날과 같은 형태와 문법을 가지게 되었다.
Discussion
VHDL is a fairly general-purpose language, although it requires a simulator on which to run the code. It can read and write files on the host computer, so a VHDL program can be written that generates another VHDL program to be incorporated in the design being developed. Because of this general-purpose nature, it is possible to use VHDL to write a testbench that verifies the functionality of the design using files on the host computer to define stimuli, interacts with the user, and compares results with those expected. This is similar to the capabilities of the Verilog language. VHDL is a strongly typed language, and as a result is considered by some to be superior to Verilog. In fact there has always been quite an intense debate which amounts to a holy war amongst developers over which is the superior language. However, both languages make it easy for the unwary and inexperienced to produce code that simulates successfully, but that cannot be synthesized into a real device, or else is too large to be practicable. A particular pitfall in both languages is the accidental production of transparent latches rather than D-type flip-flops as storage elements.
The key advantage of VHDL when used for systems design is that it allows the behaviour of the required system to be described (modelled) and verified (simulated) before synthesis tools translate the design into real hardware (gates and wires).
Another benefit is that VHDL allows the description of a concurrent system (many parts, each with its own sub-behaviour, working together at the same time). This is unlike many of the other computing languages such as BASIC, Pascal, C, or lower-level assembly language which runs at machine code level, which all run sequentially, one instruction at a time on von Neumann architectures.
A final point is that when a VHDL model is translated into the "gates and wires" that are mapped onto a programmable logic device such as a CPLD or FPGA, then it is the actual hardware being configured, rather than the VHDL code being "executed" as if on some form of a processor chip.
Getting Started
As with any hardware or software language, becoming proficient in VHDL requires a commitment to study and practice. Although background in a computer programming language (such as C) is helpful, it is not essential. Today, free VHDL simulators are readily available, and although these are limited in functionality compared to commercial VHDL simulators, they are more than sufficient for independent study. If the user's goal is to learn RTL coding, i.e. design hardware circuits in VHDL (as opposed to simply document or simulate circuit behavior), then a synthesis/design package is also essential to the learning process.
As with VHDL simulators, free FPGA synthesis tools are readily available, and are more than adequate for independent study. Feedback from the synthesis tool gives the user a feel for the relative efficiencies of different coding styles. A schematic/gate viewer shows the user the synthesized design as a navigable netlist diagram. Many FPGA design packages offer alternative design input methods, such as block-diagram (schematic) and state-diagram capture. These provide a useful starting template for coding certain types of repetitive structures, or complex state-transition diagrams. Finally, the included tutorials and examples are valuable aids.
Nearly all FPGA design and simulation flows support both Verilog and VHDL, allowing the user to learn either or both languages. Here is a list of free design & simulation packages for VHDL/Verilog:
PCI(피씨-아이]는 고속운영을 위해 마이크로프로세서와 가깝게 위치해 있는 확장 슬롯들에 부착된 장치들 간의 상호접속 시스템이다. PCI를 사용하면 컴퓨터는 새로운 PCI 카드들과, 현재 가장 일반적인 확장카드의 종류인 ISA 확장카드를 함께 지원할 수 있다. 인텔에 의해 설계된 초기의 PCI는 VESA 로컬버스와 비슷했지만, PCI 2.0부터는 더 이상 로컬버스가 아니며, 마이크로프로세서 디자인과는 독립적으로 설계되었다. PCI는 20~33 MHz 범위의 마이크로프로세서 클록 속도에 동기화 되도록 설계되었다. PCI는 이제 인텔 펜티엄 프로세서 기반의 시스템은 물론, PowerPC 기반의 시스템을 비롯한 대부분의 새로운 데스크탑 컴퓨터에 설치되었다. PCI는 124 핀의 접속으로 한번에 32 비트를 전송하며, 확장된 제품인 188 핀 접속에서는 64 비트를 전송한다. PCI는 주소와 데이터 신호를 전송하기 위해 모든 동적 경로들을 사용하며, 첫 번째 클록 사이클에 주소를 보내고 그 다음에 데이터를 보낸다. 많은 량의 데이터를 보낼 때에는 첫 번째 사이클에 시작 주소를 보낸 다음, 이어지는 일정횟수의 사이클 동안 계속해서 데이터 전송을 하는 것도 가능하다. <출처 : 김동근의 텀즈 * 컴퓨터 용어사전 http://www.terms.co.kr/>
The Peripheral Component Interconnect, or PCI Standard (in practice almost always shortened to PCI) specifies a computer bus for attaching peripheral devices to a computer motherboard. These devices can take any one of the following forms:
* An integrated circuit fitted onto the motherboard itself, called a planar device in the PCI specification. * An expansion card that fits into a socket. The PCI bus is common in modern PCs, where it has displaced ISA and VESA Local Bus as the standard expansion bus, but it also appears in many other computer types. The bus will eventually be succeeded by PCI Express, which is standard in most new computers, and other technologies.
The PCI specification covers the physical size of the bus (including wire spacing), electrical characteristics, bus timing, and protocols. The specification can be purchased from the PCI Special Interest Group (PCISIG).
Conventional hardware specifications
These specifications represent the most common version of PCI used in normal PCs.
* 33.33 MHz clock with synchronous transfers * peak transfer rate of 133 MB per second for 32-bit bus width
(33.33 MHz × 32 bits ÷ 8 bits/byte = 133 MB/s) * peak transfer rate of 266 MB/s for 64-bit bus width * 32-bit or 64-bit bus width * 32-bit address space (4 gigabytes) * 32-bit I/O port space (now deprecated) * 256-byte configuration space * 5-volt signaling * reflected-wave switching
Variants
- Conventional
* Later versions of PCI allow (and in the latest versions require) 3.3V slots (keyed differently) on motherboards and allow for cards that are either double keyed for both voltages or even 3.3V only. * PCI 2.2 allows for 66 MHz signalling (requires 3.3 volt signalling) (peak transfer rate of 533 MB/s) * PCI 2.3 permits use of 3.3 volt and universal keying, but does not allow 5 volt keyed add in cards. * PCI 3.0 is the final official standard of the bus, completely removing 5-volt capability. * PCI-X doubles the width to 64-bit, revises the protocol, and increases the maximum signaling frequency to 133 MHz (peak transfer rate of 1014 MB/s) * PCI-X 2.0 permits a 266 MHz rate (peak transfer rate of 2035 MB/s) and also 533 MHz rate, expands the configuration space to 4096 bytes, adds a 16-bit bus variant and allows for 1.5 volt signaling * Mini PCI is a new form factor of PCI 2.2 for use mainly inside laptops * CardBus is a PC card form factor for 32-bit, 33 MHz PCI * CompactPCI, uses Eurocard-sized modules plugged into a PCI backplane. * PC/104-Plus is an industrial bus that uses the PCI signal lines with different connectors.
Physical card dimensions
- Full-size card The original "full-size" PCI card is specified as a height of 107 mm (4.2 inches) and a depth of 312 mm (12.283 inches). The height includes the edge card connector. However, most modern PCI cards are half-length or smaller (see below) and many PCs cannot fit a full size card.
- Backplate In addition to these dimensions the physical size and location of a card's backplate are also standardized. The backplate is the part that fastens to the card cage to stabilize the card and also contains external connectors,so it usually attaches in a window so it is accessible from outside the computer case.
The card itself can be a smaller size, but the backplate must still be full-size and properly located so that the card fits in any standard PCI slot.
- Half-length extension card (de-facto standard) This is in fact the practical standard now - the majority of modern PCI cards fit inside this length.
- Low profile (half height) card The PCI organisation has a defined a standard for "low profile" cards, which basically fit in the following ranges:
* Height: 1.42 inches (36.07 mm) to 2.536 inches (64.41 mm) * Depth: 4.721 inches (119.91 mm) to 6.6 inches (167.64 mm) The bracket is also reduced in height, to a standard 3.118 inches (79.2 mm).
These cards may be known by other names such as "slim".
- Mini PCI This is a specialist version of PCI slot intended for laptops and the like, and is not usually used by consumers.
- Other physical variations Typically consumers systems specify "N x PCI slots" without specifying actual dimensions of the space available. In some small form-factor systems, this may not be sufficient to allow even "half-length" PCI cards to fit. Despite this limitation, these systems are still useful because many modern PCI cards are considerably smaller than half-length.
- Card keying Typical PCI cards present either one or two key notches, depending on their signaling voltage. Cards requiring 3.3 volt have a notch near the front of the card (where the external connectors are) while those requiring 5 volt have a notch near on the other side. So called "Universal cards" have both key notches and can accept both types of signal.
.
.
.
is a unit vector perpendicular to the plane containing a and b. If the vectors a and b are collinear (i.e., the angle θ between them is either 0° or 180°), by the above formula, the cross product of a and b is the zero vector 0.
must exist.
then 
and
![\frac{f(x)}{g(x)} = \frac{f(y)}{g(x)} + \left [ 1 - \frac{g(y)}{g(x)} \right ] \frac{f'(\xi)}{g'(\xi)}](http://upload.wikimedia.org/math/4/b/2/4b2548d8cc3ac15edf419fb90d5b18cf.png)
and 